Samsung Foundry has announced that it is starting mass production of its first generation chips on the 3nm node. It is based on the new GAA (Gate-All-Around) transistor architecture, which is the next step after FinFET.
Compared to 5nm, the first generation 3nm Samsung chips can provide up to 23% better performance, up to 45% lower power consumption and 16% surface area reduction.
Samsung’s second-generation 3nm node will be even more impressive: Compared to the 5nm, Samsung claims it will achieve a 50% reduction in power consumption, a performance improvement of up to 30%, and a 35% area reduction. .
Samsung is now ahead of TSMC, which is expected to begin mass production of 3nm chips in the second half of the year.
The Gate-All-Around (GAA) transistor design allows the foundry to shrink transistors, without affecting their ability to carry current. The GAAFET design used in the 3nm node is the MBCFET flavor shown in the following image.
The evolution of silicon transistors
Start a new Thread