Android supported various architectures: ARM, x86, MIPS. Even if x86 is still technically supported, the choice for smartphones, tablets and smartwatches is only up to ARM. This means that those who own ARMs have an outsized influence on the entire ecosystem. Now Qualcomm and Google have announced that they are working on an alternative architecture.

You may or may not have heard of RISC-V (pronounced “risk five”). It is an open source instruction set for CPUs that has recently gained traction. Its open source nature means chipset designers don’t have to pay royalties like they do with ARM. ARM also limits who can create custom CPU cores (which costs more).

Google and Qualcomm collaborate to develop RISC-V-based Wear OS chipsets

Google and Qualcomm are starting small: literally, the two companies are working on RISC-V-based Snapdragon Wear chipsets “that will power next-generation Wear OS solutions.”

Android still doesn’t have official support for RISC-V, the instruction set is so new that some parts are still in development, and Google hasn’t decided what core functionality will be required. But since Wear OS is based on Android, this should be a stepping stone to more powerful chipsets that will be used in phones and tablets in the future.

Google and Qualcomm collaborate to develop RISC-V-based Wear OS chipsets

That’s why RISC-V is a big deal. ARM charges companies like Qualcomm, Samsung, MediaTek, and others to use their Cortex CPU designs. Some companies like Apple, Samsung and Qualcomm (sometimes) use in-house designed CPUs, but this requires an expensive “architectural license”.

Now that RISC-V is open source doesn’t mean that all CPUs based on it are also open source. There are a few, but Qualcomm will design its own, putting its expertise into developing efficient, high-performance chips. This will provide Google (and the Android ecosystem as a whole) with an alternative platform, both as a fallback and to use as leverage when negotiating prices with ARM.

Qualcomm tends to launch new generations of Wear every two years: Wear 2100 in 2016, Wear 3100 in 2018, Wear 4100 in 2020, and most recently W5 in 2022. So, W6 next year? That’s possible, but the company’s press release ends with the vague “Commercial product launch timing of the RISC-V wearable-based solution will be announced at a later date.”

PS. RISC-V has been around for a few years now and has attracted a lot of attention from other companies too: big names like Bosch, Infineon, Nordic Semiconductor, NXP and Qualcomm have joined forces to accelerate the development of RISC-V hardware. Others, such as Western Digital, have also designed RISC-V cores for use in its flash controllers while it previously used licensed designs from ARM, Intel and others, which added costs to the millions of SSDs it shipped.

Google and Qualcomm collaborate to develop RISC-V-based Wear OS chipsets

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Philip Owell

Professional blogger, here to bring you new and interesting content every time you visit our blog.